Lattice sensAI Stack

Accelerate Integration of Flexible Inferencing at the Edge

The full-featured Lattice sensAI stack includes everything you need to evaluate, develop and deploy FPGA-based Machine Learning / Artificial Intelligence solutions - modular hardware platforms, example demonstrations, reference designs, neural network IP cores, software tools for development, and custom design services.

The Lattice’s FPGA-based machine learning solutions are highly flexible, easy to implement, low power (from under 1 mW-1 W), small (package sizes starting at 5.5 mm2) and priced for high volume production.

Lattice can help you accelerate deployment of always-on, on-device AI into a wide range of Edge applications including mobile, smart home, smart city, smart factory, and smart car products.

sensAI Stack

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Flexible and Low Power Inferencing with Lattice sensAI

Lattice FAD sensAIExpand Image

Lattice sensAI: accelerating low power AI at the edge

Design Methodology Overview

sensAI Block Diagram

  • End to end solution stack is provided enabling fast time to market
  • NN Models supported are pruned to fit the resources available
  • Training can be done using standard Machine Learning frameworks such as Tensorflow on a GPU machine
  • Sample dataset with instruction on how to tag the dataset is provided

System Architecture Examples

The following diagrams are examples of how FPGAs are commonly used to power AI/ML solutions. Lattice FPGAs give you a powerful and scalable AI/ML solution that’s simple, low-power and small-footprint. Scroll down to see hardware demonstrations you can download and evaluate today.

Stand-alone: ECP5/iCE40 UltraPlus FPGA AI enabled System

  • Always-on, integrated solutions on ECP5 or iCE40 UltraPlus FPGA
  • Low latency and secure implementation
  • FPGA resources can be used for system control

Preprocessor: iCE40 UltraPlus Event Trigger

  • iCE40 UltraPlus FPGA for always-on detection of key-phrases or objects
  • Wakes-up a high performance ASIC/ASSP for further analytics only when required
  • Reduces overall system power consumption

Preprocessor: ECP5 FPGA AI processor

  • Scalable performance/power with ECP5 based neural network acceleration
  • ECP5 based I/O flexibility to seamlessly interface to on-board legacy devices including sensors
  • Low-end MCU for flexible system control

Postprocessor: ECP/iCE40 UltraPlus AI Accelerator

  • Add AI acceleration without significant modification of the system
  • Scalable performance/power with ECP or iCE40 UltraPlus
  • ASIC/ASSP can handle data preprocessing and pass on inference data only

Hardware Platforms

Flexible, re-programmable FPGA hardware platforms for evaluation of Lattice demonstrations, and to aid in rapid prototyping of your custom AI/ML solutions.

  • Embedded Vision Development Kit (EVDK) – ECP5 FPGA-based modular development platform for AI designs requiring under 1W of power consumption. Flexible interface connectivity boards support MIPI CSI-2, embedded DisplayPort (eDP), HDMI, GigE Vision, USB 3.0 and more.
  • Mobile Development Platform – iCE40 UltraPlus FPGA-based platform for AI designs requiring a few mWs of power consumption, offers a variety of on-board image sensors, microphones, compass/pressure/gyro sensors and more.
  • Himax HM01B0 UPduino Shield - A complete development kit for implementing Artificial Intelligence (AI) using vision and sound as sensory inputs, with iCE40 UltraPlus FPGA based Upduino 2.0 board and Himax image sensor module.
  • DPControl iCEVision board - A vision focused development kit designed by DPControl with iCE40 UltraPlus FPGA and multiple interface connectors compatible with most common camera interfaces.

IP Cores

Neural network accelerator IP cores include support for convolution, pooling and fully connected network layers.

  • Convolutional Neural Network (CNN) Accelerator – Fully parameterizable IP core optimized for ECP5 FPGA implementation, includes support for variable quantization for accuracy versus power consumption tradeoffs.
  • CNN Compact Accelerator – Optimized for iCE40 UltraPlus FPGA, the accelerator supports the implementation of AI designs that allow a few mWs of power consumption.

Software Tools

The Lattice sensAI solution stack includes the Neural Network Compiler for easy integration of networks developed in TensorFlow,Caffe or Keras into Lattice FPGAs – no prior RTL experience required.

The output of the Neural Network Compiler can then be integrated into the standard Lattice FPGA development tool flows – Lattice Diamond for ECP5, or Radiant for iCE40 UltraPlus, and finally deployed to the FPGA in your system.

  • Neural Network Compiler – Rapidly analyze, simulate, and compile various networks for implementation onto Lattice CNN/CNN Compact Accelerator IP cores.

Demos & Reference Designs

Programmable Logic Demos
  Provider ECP5 / ECP5-5G iCE40 UltraPlus
Face Tracking Lattice  
Hand Gesture Detection Lattice  
Human Counting Lattice  
Human Face Detection Lattice  
Human Presence Detection Lattice
Key Phrase Detection Lattice  
Object Counting Lattice  
Package Detection Lattice, Wipro  
Speed Sign Detection Lattice  
Vehicle Classification Lattice, Softnautics  
Programmable Logic Reference Designs
  Provider ECP5 / ECP5-5G iCE40 UltraPlus
Human Presence Detection Lattice  
Object Counting Lattice  

Custom Design Services

The Lattice sensAI stack includes an ecosystem of select, worldwide design service partners that can deliver custom solutions for a range of end-applications, including mobile, smart home, smart city, smart factory, and smart cars. Click here for more information on Lattice sensAI certified partners.


Information Resources
Lattice sensAI Stack Product Brochure
I0265 4.0 5/20/2019 PDF 976.4 KB
Accelerating Implementation of Low Power Artificial Intelligence at the Edge
WP-0014 1.1 11/28/2018 PDF 1.2 MB
Harnessing the Power of AI: An Easy Start with Lattice’s sensAI
WP-0017 1.0 1/31/2019 PDF 2.3 MB


China Electronic Market 2018 Editor's Choice Awards

Most Competitive FPGA Product

EDN Hot 100 Product Award

Tools & Development

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